Rabbit Anti-Human PNOC (internal) Polyclonal antibody

Photonic network-on-chip (PNoC) architectures are a potential candidate for communication in future chip multiprocessors as they can attain higher bandwidth with lower power dissipation than electrical NoCs. PNoCs typically employ dense wavelength division multiplexing (DWDM) for high bandwidth transfers. Unfortunately, DWDM increases crosstalk noise and decreases optical signal to noise ratio (SNR) in microring resonators (MRs) threatening the reliability of data communication. Additionally, process variations induce variations in the width and thickness of MRs causing shifts in resonance wavelengths of MRs, which further reduces signal integrity, leading to communication errors and bandwidth loss. In this paper, we propose a novel encoding mechanism that intelligently adapts to on-chip process variations, and improves worst-case SNR by reducing crosstalk noise in MRs used within DWDM-based PNoCs. Experimental results on the Corona PNoC architecture indicate that our approach improves worst-case SNR by up to 44.13%.

Increases in chip density due to Moore's law allow for the implementation of ever larger and more complex systems on a single chip (SoCs). The communication mechanisms employed in such SoCs are an important contribution to their overall performance. Networks on chip (NoCs) promise to overcome the scalability problems found in bus-based interconnect. To date, most work has focused on packet-switched NoCs. Circuit-switched networks are an intriguing alternative, which promise high communication rates and predictable communication latencies. A new lightweight circuit-switched architecture called programmable NoC (PNoC) is described. PNoC is a flexible architecture that is suitable for use in FPGA-based systems. Implementation results on a Virtex-II Pro device are given using an image binarisation demonstration which resulted in as much as a 23 x speedup compared with a shared bus implementation.