Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)
2015 2ND INTERNATIONAL CONFERENCE ON INFORMATION SCIENCE AND CONTROL ENGINEERING ICISCE 2015
Authors: Ben Ahmed, Achraf; Meyer, Michael; Okuyama, Yuichi; Ben Abdallah, Abderazek
Abstract
Nowadays, increasing emerging application complexity and improvement in process technology have enabled the design of many-core processors with tens to hundreds of cores on a single chip. Photonic Network-on-Chips (PNoCs) have recently been proposed as an alternative approach with high performance-per-watt characteristics for intra-chip communication. While providing large bandwidth through WDM (Wavelength Division Multiplexing), the main design challenge of conventional hybrid PNoC lies in the control layer, which is generally used for path set-up and also for short message communication. In this paper, we propose architecture and design of an efficient router for control and communication in heterogeneous Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)(1). In addition, we present detailed complexity and performance evaluation of the proposed architecture.
Hybrid silicon-photonic network-on-chip for future generations of high-performance many-core systems
JOURNAL OF SUPERCOMPUTING
Authors: Ben Ahmed, Achraf; Ben Abdallah, Abderazek
Abstract
Photonic networks-on-chip (PNoCs) promise significant advantages over their electronic counterparts. In particular, they offer a potentially disruptive technology solution with fundamentally low power dissipation that remains independent of capacity while providing ultra-high throughput and minimal access latency. In conventional hybrid-PNoC systems, several electrical control functions, such as path setup, acknowledgment and Tear-down are necessary for the end-to-end optical transfer. However, the circuit-switched nature of photonic interconnect directly affects the performance and power characteristics of on-chip communication. In this paper, we propose an energy-efficient and high-throughput hybrid silicon-photonic network-on-chip, named PHENIC, targeted for future generations of high-performance many-core systems. PHENIC is based on a smart contention-aware path-configuration algorithm and an energy-efficient non-blocking optical switch to further exploit the low energy proprieties of the PNoC systems. Through detailed simulation, we demonstrate that the proposed system has a better performance and low energy dissipation compared to conventional hybrid-PNoCs.